From d3800ddfa2661122a09989ead47876745cba817b Mon Sep 17 00:00:00 2001 From: wendtalexander Date: Thu, 26 Sep 2024 11:24:03 +0200 Subject: [PATCH] handle initial connection, diggital trigger --- pyrelacs/repros/mccdac.py | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/pyrelacs/repros/mccdac.py b/pyrelacs/repros/mccdac.py index 0696c60..fb74764 100644 --- a/pyrelacs/repros/mccdac.py +++ b/pyrelacs/repros/mccdac.py @@ -19,7 +19,11 @@ class MccDac: log.error("Did not found daq devices, please connect one") exit(1) self.daq_device = uldaq.DaqDevice(devices[0]) - self.daq_device.connect() + try: + self.daq_device.connect() + except uldaq.ul_exception.ULException: + self.disconnect_dac() + self.connect_dac() self.ai_device = self.daq_device.get_ai_device() self.ao_device = self.daq_device.get_ao_device() self.dio_device = self.daq_device.get_dio_device() @@ -85,8 +89,8 @@ class MccDac: buffer = c_double * len(data) data_analog_output = buffer(*data) - log.debug(f"Created C_double data {data_analog_output}") + try: err = self.ao_device.a_out_scan( channels[0], @@ -123,12 +127,13 @@ class MccDac: self.disconnect_dac() def diggital_trigger(self) -> None: - if not self.read_bit(channel=0): - self.write_bit(channel=0, bit=1) - else: + data = self.read_bit(channel=0) + if data: self.write_bit(channel=0, bit=0) time.time_ns() self.write_bit(channel=0, bit=1) + else: + self.write_bit(channel=0, bit=1) def write_bit(self, channel: int = 0, bit: int = 1) -> None: self.dio_device.d_config_bit( @@ -266,7 +271,7 @@ class MccDac: log.info("Muting channel one") binary_db2 = "00000000" - channels_db = binary_db1 + binary_db2 + channels_db = binary_db2 + binary_db1 self.write_bit(channel=4, bit=0) for b in channels_db: self.write_bit(channel=5, bit=int(b))